WO1999018485A3 - Variable instruction set computer - Google Patents

Variable instruction set computer Download PDF

Info

Publication number
WO1999018485A3
WO1999018485A3 PCT/IB1998/001453 IB9801453W WO9918485A3 WO 1999018485 A3 WO1999018485 A3 WO 1999018485A3 IB 9801453 W IB9801453 W IB 9801453W WO 9918485 A3 WO9918485 A3 WO 9918485A3
Authority
WO
WIPO (PCT)
Prior art keywords
instructions
virtual machine
program
core
sequence
Prior art date
Application number
PCT/IB1998/001453
Other languages
French (fr)
Other versions
WO1999018485A2 (en
Inventor
Alexander Augusteijn
Eelco J Dijkstra
Paulus M H M A Gorissen
Franciscus J H M Meulenbroeks
Paul Stravers
Joachim A Trescher
Original Assignee
Koninkl Philips Electronics Nv
Philips Svenska Ab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv, Philips Svenska Ab filed Critical Koninkl Philips Electronics Nv
Priority to JP52133799A priority Critical patent/JP4018158B2/en
Priority to EP98941638A priority patent/EP0941508B1/en
Priority to DE69836902T priority patent/DE69836902T2/en
Publication of WO1999018485A2 publication Critical patent/WO1999018485A2/en
Publication of WO1999018485A3 publication Critical patent/WO1999018485A3/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/3017Runtime instruction translation, e.g. macros
    • G06F9/30174Runtime instruction translation, e.g. macros for non-native instruction set, e.g. Javabyte, legacy code
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181Instruction operation extension or modification
    • G06F9/30189Instruction operation extension or modification according to execution mode, e.g. mode flag
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3861Recovery, e.g. branch miss-prediction, exception handling
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3877Concurrent instruction execution, e.g. pipeline, look ahead using a slave processor, e.g. coprocessor
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/448Execution paradigms, e.g. implementations of programming paradigms
    • G06F9/4482Procedural
    • G06F9/4484Executing subprograms
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/461Saving or restoring of program or task context
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S707/00Data processing: database and file management or data structures
    • Y10S707/99951File or database maintenance
    • Y10S707/99952Coherency, e.g. same view to multiple users
    • Y10S707/99953Recoverability
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S707/00Data processing: database and file management or data structures
    • Y10S707/99951File or database maintenance
    • Y10S707/99956File allocation
    • Y10S707/99957Garbage collection

Abstract

A source program is executed on microcontroller core (114) of a processing unit (100). The core (114) is capable of native instructions from a predetermined set of microcontroller specific instructions. In a pre-processing step, for the program statements of the source program a program-specific virtual machine is defined with a corresponding set of virtual machine instructions, such that the expression of the program statements in the sequence of instructions requires less storage space compared to using only native instructions. For the program-specific virtual machine an associated conversion means (132) is defined for converting the program-specific virtual machine instructions into the native instructions of the core (114). The source program statements are expressed in a sequence of instructions comprising instructions of the defined virtual machine. The sequence of instructions is stored in an instruction memory (120). The conversion means (114) is represented in the processing unit (100). During execution, instrutions are fetched from the instruction memory (120). The conversion means (114) is used to convert the fetched virtual machine instructions into native instructions for execution by the core (114).
PCT/IB1998/001453 1997-10-02 1998-09-21 Variable instruction set computer WO1999018485A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP52133799A JP4018158B2 (en) 1997-10-02 1998-09-21 Variable instruction set computer
EP98941638A EP0941508B1 (en) 1997-10-02 1998-09-21 Variable instruction set computer
DE69836902T DE69836902T2 (en) 1997-10-02 1998-09-21 COMPUTER SETTING ON VARIABLE INSTRUCTIONS

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
EP97203033 1997-10-02
EP97203033.2 1997-12-12
EP97203905 1997-12-12
EP97203905.1 1997-12-12

Publications (2)

Publication Number Publication Date
WO1999018485A2 WO1999018485A2 (en) 1999-04-15
WO1999018485A3 true WO1999018485A3 (en) 1999-07-01

Family

ID=26146919

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/IB1998/001453 WO1999018485A2 (en) 1997-10-02 1998-09-21 Variable instruction set computer

Country Status (5)

Country Link
US (1) US6292883B1 (en)
EP (1) EP0941508B1 (en)
JP (1) JP4018158B2 (en)
DE (1) DE69836902T2 (en)
WO (1) WO1999018485A2 (en)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6513156B2 (en) * 1997-06-30 2003-01-28 Sun Microsystems, Inc. Interpreting functions utilizing a hybrid of virtual and native machine instructions
US6826749B2 (en) * 1998-12-08 2004-11-30 Nazomi Communications, Inc. Java hardware accelerator using thread manager
US7225436B1 (en) 1998-12-08 2007-05-29 Nazomi Communications Inc. Java hardware accelerator using microcode engine
US6332215B1 (en) * 1998-12-08 2001-12-18 Nazomi Communications, Inc. Java virtual machine hardware for RISC and CISC processors
US6654778B1 (en) * 1999-01-29 2003-11-25 International Business Machines Corporation Method and apparatus for avoiding function activation and interpretation overhead for calls to selected java methods in a java virtual machine interpreter
GB2357684A (en) * 1999-12-21 2001-06-27 Motorola Ltd Hand-held terminal having a display screen which is controlled by movement of the terminal
JP3556556B2 (en) * 2000-02-08 2004-08-18 株式会社東芝 Instruction code conversion device and information processing system
KR20020028814A (en) 2000-10-10 2002-04-17 나조미 커뮤니케이션즈, 인코포레이티드 Java hardware accelerator using microcode engine
US6978456B1 (en) 2000-10-31 2005-12-20 Sun Microsystems, Inc. Methods and apparatus for numeric constant value inlining in virtual machines
US6901591B1 (en) 2000-10-31 2005-05-31 Sun Microsystems, Inc. Frameworks for invoking methods in virtual machines
US6996813B1 (en) * 2000-10-31 2006-02-07 Sun Microsystems, Inc. Frameworks for loading and execution of object-based programs
JP2002169696A (en) * 2000-12-04 2002-06-14 Mitsubishi Electric Corp Data processing apparatus
US7242719B2 (en) * 2000-12-06 2007-07-10 Koninklijke Philips Electronics N.V. Method and apparatus for space-saving-variable length encoding and decoding
US6789187B2 (en) * 2000-12-15 2004-09-07 Intel Corporation Processor reset and instruction fetches
JP2002215387A (en) * 2001-01-22 2002-08-02 Mitsubishi Electric Corp Data processor provided with instruction translator, and memory interface device
US7181484B2 (en) 2001-02-21 2007-02-20 Mips Technologies, Inc. Extended-precision accumulation of multiplier output
US7162621B2 (en) * 2001-02-21 2007-01-09 Mips Technologies, Inc. Virtual instruction expansion based on template and parameter selector information specifying sign-extension or concentration
US7711763B2 (en) 2001-02-21 2010-05-04 Mips Technologies, Inc. Microprocessor instructions for performing polynomial arithmetic operations
US7096466B2 (en) * 2001-03-26 2006-08-22 Sun Microsystems, Inc. Loading attribute for partial loading of class files into virtual machines
US7020874B2 (en) * 2001-03-26 2006-03-28 Sun Microsystems, Inc. Techniques for loading class files into virtual machines
US6957428B2 (en) 2001-03-27 2005-10-18 Sun Microsystems, Inc. Enhanced virtual machine instructions
US7543288B2 (en) * 2001-03-27 2009-06-02 Sun Microsystems, Inc. Reduced instruction set for Java virtual machines
GB2376099B (en) * 2001-05-31 2005-11-16 Advanced Risc Mach Ltd Program instruction interpretation
US7174006B2 (en) * 2001-06-18 2007-02-06 Nms Communications Corporation Method and system of VoiceXML interpreting
US7228533B2 (en) * 2001-08-24 2007-06-05 Sun Microsystems, Inc. Frameworks for generation of Java macro instructions for performing programming loops
US8769508B2 (en) * 2001-08-24 2014-07-01 Nazomi Communications Inc. Virtual machine hardware for RISC and CISC processors
US7039904B2 (en) * 2001-08-24 2006-05-02 Sun Microsystems, Inc. Frameworks for generation of Java macro instructions for storing values into local variables
US6988261B2 (en) * 2001-08-24 2006-01-17 Sun Microsystems, Inc. Frameworks for generation of Java macro instructions in Java computing environments
US7058934B2 (en) * 2001-08-24 2006-06-06 Sun Microsystems, Inc. Frameworks for generation of Java macro instructions for instantiating Java objects
KR20040039412A (en) * 2001-09-25 2004-05-10 코닌클리케 필립스 일렉트로닉스 엔.브이. Software support for virtual machine interpreter(vmi) acceleration hardware
FR2837294A1 (en) * 2002-03-12 2003-09-19 Koninkl Philips Electronics Nv DEVICE TO ACCELERATE THE INTERPRETATION OF A PROGRAM IN INTERPRETED LANGUAGE
US20030192035A1 (en) * 2002-04-09 2003-10-09 Duesterwald Ald Evelyn Systems and methods for implementing efficient execution transfers between successive translations of stack-based program code in a virtual machine environment
US7185215B2 (en) * 2003-02-24 2007-02-27 International Business Machines Corporation Machine code builder derived power consumption reduction
US8584109B2 (en) 2006-10-27 2013-11-12 Microsoft Corporation Virtualization for diversified tamper resistance
EP2482184A1 (en) * 2011-02-01 2012-08-01 Irdeto B.V. Adaptive obfuscated virtual machine
EP3001313A1 (en) * 2014-09-23 2016-03-30 dSPACE digital signal processing and control engineering GmbH Methods for simulating an application program of an electronic control device on a computer

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5586323A (en) * 1991-04-23 1996-12-17 Hitachi, Ltd. Compilier system using an intermediate abstract form and machine-specific installers
WO1997023823A2 (en) * 1995-12-21 1997-07-03 Philips Electronics N.V. Machine code format translation
WO1997027536A1 (en) * 1996-01-24 1997-07-31 Sun Microsystems, Inc. Instruction folding for a stack-based machine
WO1997027537A2 (en) * 1996-01-24 1997-07-31 Sun Microsystems, Inc. A processor for executing instruction sets received from a network or from a local memory

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4245302A (en) * 1978-10-10 1981-01-13 Magnuson Computer Systems, Inc. Computer and method for executing target instructions
JPS56152049A (en) * 1980-04-25 1981-11-25 Toshiba Corp Microprogram control system
US4403284A (en) * 1980-11-24 1983-09-06 Texas Instruments Incorporated Microprocessor which detects leading 1 bit of instruction to obtain microcode entry point address
US4719565A (en) * 1984-11-01 1988-01-12 Advanced Micro Devices, Inc. Interrupt and trap handling in microprogram sequencer
US5430862A (en) * 1990-06-29 1995-07-04 Bull Hn Information Systems Inc. Emulation of CISC instructions by RISC instructions using two pipelined stages for overlapped CISC decoding and RISC execution
US6151618A (en) * 1995-12-04 2000-11-21 Microsoft Corporation Safe general purpose virtual machine computing system
US6021273A (en) * 1997-06-30 2000-02-01 Sun Microsystems, Inc. Interpreter generation and implementation utilizing interpreter states and register caching
US6078322A (en) * 1997-09-30 2000-06-20 The United States Of America As Represented By The Secretary Of The Navy Methods permitting rapid generation of platform independent software applications executed on a universal client device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5586323A (en) * 1991-04-23 1996-12-17 Hitachi, Ltd. Compilier system using an intermediate abstract form and machine-specific installers
WO1997023823A2 (en) * 1995-12-21 1997-07-03 Philips Electronics N.V. Machine code format translation
WO1997027536A1 (en) * 1996-01-24 1997-07-31 Sun Microsystems, Inc. Instruction folding for a stack-based machine
WO1997027537A2 (en) * 1996-01-24 1997-07-31 Sun Microsystems, Inc. A processor for executing instruction sets received from a network or from a local memory

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
DEPARTMENT OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCES, UNIVERSITY OF CALIFORNIA, BERKELEY, 94720, DAVID G. MESSERSCHMITT, "The Convergence and Telecommunications and Computing: What are the Implications Today?", IEEE PROCEEDINGS, August 1996, pages 17-22. *

Also Published As

Publication number Publication date
US6292883B1 (en) 2001-09-18
WO1999018485A2 (en) 1999-04-15
JP4018158B2 (en) 2007-12-05
EP0941508B1 (en) 2007-01-17
EP0941508A1 (en) 1999-09-15
DE69836902D1 (en) 2007-03-08
DE69836902T2 (en) 2007-10-18
JP2001508908A (en) 2001-07-03

Similar Documents

Publication Publication Date Title
WO1999018485A3 (en) Variable instruction set computer
EP0938703B1 (en) Real time program language accelerator
EP1019794B1 (en) Data processing device for processing virtual machine instructions
US6349377B1 (en) Processing device for executing virtual machine instructions that includes instruction refeeding means
KR101407629B1 (en) Apparatus and method for accelerating java translation
WO2001086440A3 (en) Migrating processes using data representation language representations of the processes in a distributed computing environment
KR950001485A (en) Operation Processing Method and Micro Computer
KR20010104687A (en) Java virtual machine hardware for RISC and CISC processors
MY127147A (en) Restarting translated instructions
RU2003112679A (en) HARDWARE TRANSLATION OF TEAMS INSIDE THE PROCESSOR CONVEYOR
EP0198231A3 (en) Data processor with parallel instruction control and execution
CA2082068A1 (en) System and method for automatically interfacing call conventions between two dissimilar program units
EP0352082A3 (en) Microinstruction addressing in a pipeline-CPU (operating method, addressing method, memory stack and CPU )
WO2004059426A3 (en) System and method for using native code interpretation to move threads to a safe state in a run-time environment
CA2003004A1 (en) Apparatus and method for executing a conditional branch instruction
US5150474A (en) Method for transferring arguments between object programs by switching address modes according to mode identifying flag
JPH0683615A (en) Computer for executing instruction set emulation
CN1371053A (en) Application program downloading method in compilation system platform of electronic communication equipment
KR950012382B1 (en) Emulation apparatus
JPS62151938A (en) Instruction processing system
JPS5582356A (en) Pre-fetch control system
KR100388943B1 (en) Apparatus for processing immediate data on a DSP
WO1996008763A3 (en) Method, apparatus and instruction for performing a double jump register indirect operation transfer in a microcontroller
JPH06168140A (en) Program converter
Cooper The direct execution of intermediate languages on an Eclipse computer

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): JP

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE

WWE Wipo information: entry into national phase

Ref document number: 1998941638

Country of ref document: EP

ENP Entry into the national phase

Ref country code: JP

Ref document number: 1999 521337

Kind code of ref document: A

Format of ref document f/p: F

121 Ep: the epo has been informed by wipo that ep was designated in this application
AK Designated states

Kind code of ref document: A3

Designated state(s): JP

AL Designated countries for regional patents

Kind code of ref document: A3

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE

WWP Wipo information: published in national office

Ref document number: 1998941638

Country of ref document: EP

WWG Wipo information: grant in national office

Ref document number: 1998941638

Country of ref document: EP