WO2000036491A3 - Programming system and thread synchronization mechanisms for the development of selectively sequential and multithreaded computer programs - Google Patents

Programming system and thread synchronization mechanisms for the development of selectively sequential and multithreaded computer programs Download PDF

Info

Publication number
WO2000036491A3
WO2000036491A3 PCT/US1999/030274 US9930274W WO0036491A3 WO 2000036491 A3 WO2000036491 A3 WO 2000036491A3 US 9930274 W US9930274 W US 9930274W WO 0036491 A3 WO0036491 A3 WO 0036491A3
Authority
WO
WIPO (PCT)
Prior art keywords
multithreaded
programming system
development
computer programs
type
Prior art date
Application number
PCT/US1999/030274
Other languages
French (fr)
Other versions
WO2000036491A9 (en
WO2000036491A2 (en
Inventor
John Thornley
K Mani Chandy
Hiroshi Ishii
Original Assignee
California Inst Of Techn
John Thornley
K Mani Chandy
Hiroshi Ishii
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by California Inst Of Techn, John Thornley, K Mani Chandy, Hiroshi Ishii filed Critical California Inst Of Techn
Priority to AU25907/00A priority Critical patent/AU2590700A/en
Publication of WO2000036491A2 publication Critical patent/WO2000036491A2/en
Publication of WO2000036491A3 publication Critical patent/WO2000036491A3/en
Publication of WO2000036491A9 publication Critical patent/WO2000036491A9/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4843Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/52Program synchronisation; Mutual exclusion, e.g. by means of semaphores

Abstract

A structured multithreaded programming system is described for integrated use with existing and new programming languages and systems. The structured multithreaded programming system enables programs to be developed which include both multithreaded and multithreadable code constructs. The multithreaded code constructs require explicitly concurrent execution. The multithreadable code constructs can be executed either sequentially or concurrently, at the selection of the programmer or computer user (401). When executed concurrently, the different threads of execution in a multithreaded program developed with this system can be synchronized using innovative synchronization objects (404). One type of synchronization object is a special type of counter (400), which can be constrained to be monotonically increasing in value. Another related type of synchronization object is a special type of flag, which can be constrained to have its value set monotonically.
PCT/US1999/030274 1998-12-17 1999-12-15 Programming system and thread synchronization mechanisms for the development of selectively sequential and multithreaded computer programs WO2000036491A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU25907/00A AU2590700A (en) 1998-12-17 1999-12-15 Programming system and thread synchronization mechanisms for the development of selectively sequential and multithreaded computer programs

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11281798P 1998-12-17 1998-12-17
US60/112,817 1998-12-17

Publications (3)

Publication Number Publication Date
WO2000036491A2 WO2000036491A2 (en) 2000-06-22
WO2000036491A3 true WO2000036491A3 (en) 2000-11-09
WO2000036491A9 WO2000036491A9 (en) 2001-09-13

Family

ID=22345987

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1999/030274 WO2000036491A2 (en) 1998-12-17 1999-12-15 Programming system and thread synchronization mechanisms for the development of selectively sequential and multithreaded computer programs

Country Status (2)

Country Link
AU (1) AU2590700A (en)
WO (1) WO2000036491A2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7831974B2 (en) 2002-11-12 2010-11-09 Intel Corporation Method and apparatus for serialized mutual exclusion
US7430737B2 (en) * 2003-12-04 2008-09-30 Sun Microsystems, Inc. Processor and method for supporting compiler directed multithreading management
CN101548268B (en) * 2006-10-05 2014-05-21 瓦拉泰克有限公司 Advanced contention detection

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5179702A (en) * 1989-12-29 1993-01-12 Supercomputer Systems Limited Partnership System and method for controlling a highly parallel multiprocessor using an anarchy based scheduler for parallel execution thread scheduling
US5197130A (en) * 1989-12-29 1993-03-23 Supercomputer Systems Limited Partnership Cluster architecture for a highly parallel scalar/vector multiprocessor system
US5551034A (en) * 1993-01-08 1996-08-27 Cegelec System for synchronizing replicated tasks
US5768594A (en) * 1995-07-14 1998-06-16 Lucent Technologies Inc. Methods and means for scheduling parallel processors

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5179702A (en) * 1989-12-29 1993-01-12 Supercomputer Systems Limited Partnership System and method for controlling a highly parallel multiprocessor using an anarchy based scheduler for parallel execution thread scheduling
US5197130A (en) * 1989-12-29 1993-03-23 Supercomputer Systems Limited Partnership Cluster architecture for a highly parallel scalar/vector multiprocessor system
US5551034A (en) * 1993-01-08 1996-08-27 Cegelec System for synchronizing replicated tasks
US5768594A (en) * 1995-07-14 1998-06-16 Lucent Technologies Inc. Methods and means for scheduling parallel processors

Also Published As

Publication number Publication date
WO2000036491A9 (en) 2001-09-13
WO2000036491A2 (en) 2000-06-22
AU2590700A (en) 2000-07-03

Similar Documents

Publication Publication Date Title
US7200846B2 (en) System and method for maintaining data synchronization
CA2016068A1 (en) Multiple instruction issue computer architecture
CN1846194B (en) Method and device for executing Parallel programs thread
WO2005048010A3 (en) Method and system for minimizing thread switching overheads and memory usage in multithreaded processing using floating threads
EP0933698A3 (en) Probing computer memory latency
ATE484793T1 (en) MULTITHREAD EMBEDDED PROCESSOR WITH INPUT-OUTPUT CAPABILITY
WO2001093027A3 (en) Monitor entry and exit for a speculative thread during space and time dimensional execution
WO2001016698A3 (en) Memory reference instructions for micro engine used in multithreaded parallel processor architecture
WO2000079383A3 (en) Supporting multi-dimensional space-time computing through object versioning
EP1416376A3 (en) Multi-threaded embedded processor having deterministic instruction memory
Welch Java Threads in the Light of occam/CSP
CA2283046A1 (en) Methodology for emulation of multi-threaded processes in a single-threaded operating system
Fidge et al. The deadline command
EP0955584A3 (en) Fast synchronization for programs written in the java programming language
WO2000036491A3 (en) Programming system and thread synchronization mechanisms for the development of selectively sequential and multithreaded computer programs
Meyer The new culture of software development: Reflections on the practice of object-oriented design
Aviram et al. Deterministic {OpenMP} for {Race-Free} Parallelism
Yuan et al. STARPro—a new multithreaded direct execution platform for Esterel
US20020087844A1 (en) Apparatus and method for concealing switch latency
Li et al. A concurrent reactive Esterel processor based on multi-threading
WO2001090889A3 (en) Instruction dependency scoreboard with a hierarchical structure
Brosgol et al. Real-time convergence of Ada and Java™
Spiliopoulou Concurrent and distributed functional systems
Dvorak et al. Hard real-time: C++ versus RTSJ
Nebbe Coordination and Composition: The Two Paradigms Underlying AOP?

Legal Events

Date Code Title Description
AK Designated states

Kind code of ref document: A2

Designated state(s): AE AL AM AT AU AZ BA BB BG BR BY CA CH CN CR CU CZ DE DK DM EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX NO NZ PL PT RO RU SD SE SG SI SK SL TJ TM TR TT TZ UA UG US UZ VN YU ZA ZW

AL Designated countries for regional patents

Kind code of ref document: A2

Designated state(s): GH GM KE LS MW SD SL SZ TZ UG ZW AM AZ BY KG KZ MD RU TJ TM AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE BF BJ CF CG CI CM GA GN GW ML MR NE SN TD TG

121 Ep: the epo has been informed by wipo that ep was designated in this application
DFPE Request for preliminary examination filed prior to expiration of 19th month from priority date (pct application filed before 20040101)
AK Designated states

Kind code of ref document: A3

Designated state(s): AE AL AM AT AU AZ BA BB BG BR BY CA CH CN CR CU CZ DE DK DM EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX NO NZ PL PT RO RU SD SE SG SI SK SL TJ TM TR TT TZ UA UG US UZ VN YU ZA ZW

AL Designated countries for regional patents

Kind code of ref document: A3

Designated state(s): GH GM KE LS MW SD SL SZ TZ UG ZW AM AZ BY KG KZ MD RU TJ TM AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE BF BJ CF CG CI CM GA GN GW ML MR NE SN TD TG

AK Designated states

Kind code of ref document: C2

Designated state(s): AE AL AM AT AU AZ BA BB BG BR BY CA CH CN CR CU CZ DE DK DM EE ES FI GB GD GE GH GM HR HU ID IL IN IS JP KE KG KP KR KZ LC LK LR LS LT LU LV MA MD MG MK MN MW MX NO NZ PL PT RO RU SD SE SG SI SK SL TJ TM TR TT TZ UA UG US UZ VN YU ZA ZW

AL Designated countries for regional patents

Kind code of ref document: C2

Designated state(s): GH GM KE LS MW SD SL SZ TZ UG ZW AM AZ BY KG KZ MD RU TJ TM AT BE CH CY DE DK ES FI FR GB GR IE IT LU MC NL PT SE BF BJ CF CG CI CM GA GN GW ML MR NE SN TD TG

COP Corrected version of pamphlet

Free format text: PAGES 62-98, DESCRIPTION, REPLACED BY NEW PAGES 62-98; PAGES 1/4-4/4, DRAWINGS, REPLACED BY NEW PAGES 1/3-3/3; DUE TO LATE TRANSMITTAL BY THE RECEIVING OFFICE

REG Reference to national code

Ref country code: DE

Ref legal event code: 8642

122 Ep: pct application non-entry in european phase