WO2002017064A3 - System and method for power management in a java accelerator environment - Google Patents
System and method for power management in a java accelerator environment Download PDFInfo
- Publication number
- WO2002017064A3 WO2002017064A3 PCT/EP2001/009509 EP0109509W WO0217064A3 WO 2002017064 A3 WO2002017064 A3 WO 2002017064A3 EP 0109509 W EP0109509 W EP 0109509W WO 0217064 A3 WO0217064 A3 WO 0217064A3
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- java
- power management
- processor
- host processor
- power
- Prior art date
Links
- 238000007726 management method Methods 0.000 abstract 2
- 230000000977 initiatory effect Effects 0.000 abstract 1
- 230000011664 signaling Effects 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3877—Concurrent instruction execution, e.g. pipeline, look ahead using a slave processor, e.g. coprocessor
- G06F9/3879—Concurrent instruction execution, e.g. pipeline, look ahead using a slave processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Abstract
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002521689A JP2004507814A (en) | 2000-08-23 | 2001-08-17 | Power management system and method in JAVA accelerator environment |
AT01980250T ATE528708T1 (en) | 2000-08-23 | 2001-08-17 | SYSTEM AND METHODS FOR PERFORMANCE MANAGEMENT IN A JAVA ACCELERATOR ENVIRONMENT |
KR1020027005141A KR20020085883A (en) | 2000-08-23 | 2001-08-17 | System and method for power management in a java accelerator environment |
EP01980250A EP1368729B1 (en) | 2000-08-23 | 2001-08-17 | System and method for power management in a java accelerator environment |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/645,468 | 2000-08-23 | ||
US09/645,468 US6766460B1 (en) | 2000-08-23 | 2000-08-23 | System and method for power management in a Java accelerator environment |
Publications (2)
Publication Number | Publication Date |
---|---|
WO2002017064A2 WO2002017064A2 (en) | 2002-02-28 |
WO2002017064A3 true WO2002017064A3 (en) | 2003-10-09 |
Family
ID=24589147
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/EP2001/009509 WO2002017064A2 (en) | 2000-08-23 | 2001-08-17 | System and method for power management in a java accelerator environment |
Country Status (7)
Country | Link |
---|---|
US (1) | US6766460B1 (en) |
EP (1) | EP1368729B1 (en) |
JP (1) | JP2004507814A (en) |
KR (1) | KR20020085883A (en) |
CN (1) | CN100437433C (en) |
AT (1) | ATE528708T1 (en) |
WO (1) | WO2002017064A2 (en) |
Families Citing this family (20)
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EP1387258A3 (en) * | 2002-07-31 | 2008-01-02 | Texas Instruments Incorporated | Processor-processor synchronization |
TW583530B (en) * | 2002-08-20 | 2004-04-11 | Via Tech Inc | Method of using N division operation to switch CPU work voltage |
US8086884B2 (en) * | 2002-12-16 | 2011-12-27 | Hewlett-Packard Development Company, L.P. | System and method for implementing an integrated circuit having dynamically variable power limit |
US7444524B2 (en) * | 2002-12-30 | 2008-10-28 | Intel Corporation | Dynamic voltage transitions |
US7203857B2 (en) * | 2003-03-28 | 2007-04-10 | Elliptic Semiconductor Inc. | On-demand clock switching |
US7281149B2 (en) * | 2004-02-24 | 2007-10-09 | Hewlett-Packard Development Company, L.P. | Systems and methods for transitioning a CPU from idle to active |
US7409670B1 (en) * | 2004-04-01 | 2008-08-05 | Altera Corporation | Scheduling logic on a programmable device implemented using a high-level language |
US7370311B1 (en) | 2004-04-01 | 2008-05-06 | Altera Corporation | Generating components on a programmable device using a high-level language |
US7536567B2 (en) * | 2004-12-10 | 2009-05-19 | Hewlett-Packard Development Company, L.P. | BIOS-based systems and methods of processor power management |
US7502948B2 (en) | 2004-12-30 | 2009-03-10 | Intel Corporation | Method, system, and apparatus for selecting a maximum operation point based on number of active cores and performance level of each of the active cores |
US7346863B1 (en) | 2005-09-28 | 2008-03-18 | Altera Corporation | Hardware acceleration of high-level language code sequences on programmable devices |
US7752480B2 (en) * | 2006-08-18 | 2010-07-06 | International Business Machines Corporation | System and method for switching digital circuit clock net driver without losing clock pulses |
US8086977B2 (en) * | 2006-08-18 | 2011-12-27 | International Business Machines Corporation | Design Structure for switching digital circuit clock net driver without losing clock pulses |
US7962775B1 (en) * | 2007-01-10 | 2011-06-14 | Marvell International Ltd. | Methods and apparatus for power mode control for PDA with separate communications and applications processors |
JP5084372B2 (en) | 2007-07-03 | 2012-11-28 | キヤノン株式会社 | Data processing apparatus and data processing apparatus control method |
GB2452778A (en) * | 2007-09-17 | 2009-03-18 | Toshiba Res Europ Ltd | Linking dynamic voltage scaling in master and slave modules |
US8949635B2 (en) * | 2007-09-28 | 2015-02-03 | Intel Corporation | Integrated circuit performance improvement across a range of operating conditions and physical constraints |
US7992015B2 (en) * | 2008-02-05 | 2011-08-02 | Dell Products L.P. | Processor performance state optimization |
KR101832821B1 (en) * | 2012-09-10 | 2018-02-27 | 삼성전자주식회사 | Method of scaling voltage-frequency, application processor, and mobile device having the same |
US11073894B2 (en) * | 2019-05-24 | 2021-07-27 | Qualcomm Incorporated | System power management for peripheral component interconnect express (PCIE)-based devices |
Citations (6)
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US5392437A (en) * | 1992-11-06 | 1995-02-21 | Intel Corporation | Method and apparatus for independently stopping and restarting functional units |
US5530932A (en) * | 1994-12-23 | 1996-06-25 | Intel Corporation | Cache coherent multiprocessing computer system with reduced power operating features |
US5787297A (en) * | 1992-03-31 | 1998-07-28 | Seiko Epson Corporation | Selective power-down for high performance CPU/system |
US5953741A (en) * | 1996-11-27 | 1999-09-14 | Vlsi Technology, Inc. | Stack cache for stack-based processor and method thereof |
US5996083A (en) * | 1995-08-11 | 1999-11-30 | Hewlett-Packard Company | Microprocessor having software controllable power consumption |
WO2000002118A1 (en) * | 1998-07-02 | 2000-01-13 | Hitachi, Ltd. | Microprocessor |
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US565679A (en) | 1896-08-11 | William glanzer | ||
US670496A (en) | 1900-10-20 | 1901-03-26 | Eureka Shoe Company | Hand tacking tool. |
US4171539A (en) * | 1977-12-19 | 1979-10-16 | The Bendix Corporation | Power strobed digital computer system |
US4203153A (en) * | 1978-04-12 | 1980-05-13 | Diebold, Incorporated | Circuit for reducing power consumption in battery operated microprocessor based systems |
US5497497A (en) * | 1989-11-03 | 1996-03-05 | Compaq Computer Corp. | Method and apparatus for resetting multiple processors using a common ROM |
US5251320A (en) * | 1990-05-25 | 1993-10-05 | International Business Machines Corporation | Power controller for permitting multiple processors to power up shared input/output devices and inhibit power down until all processors have ceased service with the I/O devices |
US6026484A (en) | 1993-11-30 | 2000-02-15 | Texas Instruments Incorporated | Data processing apparatus, system and method for if, then, else operation using write priority |
US6116768A (en) | 1993-11-30 | 2000-09-12 | Texas Instruments Incorporated | Three input arithmetic logic unit with barrel rotator |
US5517649A (en) * | 1994-04-19 | 1996-05-14 | Maxtor Corporation | Adaptive power management for hard disk drives |
US5983340A (en) | 1995-12-07 | 1999-11-09 | Conexant Systems, Inc. | Microprocessor system with flexible instruction controlled by prior instruction |
DE69738810D1 (en) | 1996-01-24 | 2008-08-14 | Sun Microsystems Inc | COMMAND FOLDING IN A STACK MEMORY PROCESSOR |
US5991863A (en) | 1996-08-30 | 1999-11-23 | Texas Instruments Incorporated | Single carry/borrow propagate adder/decrementer for generating register stack addresses in a microprocessor |
US6009505A (en) | 1996-12-02 | 1999-12-28 | Compaq Computer Corp. | System and method for routing one operand to arithmetic logic units from fixed register slots and another operand from any register slot |
US6330659B1 (en) * | 1997-11-06 | 2001-12-11 | Iready Corporation | Hardware accelerator for an object-oriented programming language |
DE19749068B4 (en) * | 1997-11-06 | 2005-03-10 | Bosch Gmbh Robert | Method and device for monitoring a computer system consisting of at least two processors |
US6035408A (en) * | 1998-01-06 | 2000-03-07 | Magnex Corp. | Portable computer with dual switchable processors for selectable power consumption |
US6240521B1 (en) * | 1998-09-10 | 2001-05-29 | International Business Machines Corp. | Sleep mode transition between processors sharing an instruction set and an address space |
JP2000194668A (en) * | 1998-12-25 | 2000-07-14 | Toshiba Corp | Computer system and intermediate code execution device and method applied to the computer system |
US6341354B1 (en) * | 1999-04-16 | 2002-01-22 | Smartpower Corporation | Energy-conserving computer accessible remotely and instantaneously by providing keep-alive power to memory |
US6425086B1 (en) * | 1999-04-30 | 2002-07-23 | Intel Corporation | Method and apparatus for dynamic power control of a low power processor |
US6507946B2 (en) * | 1999-06-11 | 2003-01-14 | International Business Machines Corporation | Process and system for Java virtual method invocation |
-
2000
- 2000-08-23 US US09/645,468 patent/US6766460B1/en not_active Expired - Lifetime
-
2001
- 2001-08-17 AT AT01980250T patent/ATE528708T1/en not_active IP Right Cessation
- 2001-08-17 CN CNB018032877A patent/CN100437433C/en not_active Expired - Fee Related
- 2001-08-17 JP JP2002521689A patent/JP2004507814A/en not_active Withdrawn
- 2001-08-17 KR KR1020027005141A patent/KR20020085883A/en not_active Application Discontinuation
- 2001-08-17 EP EP01980250A patent/EP1368729B1/en not_active Expired - Lifetime
- 2001-08-17 WO PCT/EP2001/009509 patent/WO2002017064A2/en active Application Filing
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5787297A (en) * | 1992-03-31 | 1998-07-28 | Seiko Epson Corporation | Selective power-down for high performance CPU/system |
US5392437A (en) * | 1992-11-06 | 1995-02-21 | Intel Corporation | Method and apparatus for independently stopping and restarting functional units |
US5530932A (en) * | 1994-12-23 | 1996-06-25 | Intel Corporation | Cache coherent multiprocessing computer system with reduced power operating features |
US5996083A (en) * | 1995-08-11 | 1999-11-30 | Hewlett-Packard Company | Microprocessor having software controllable power consumption |
US5953741A (en) * | 1996-11-27 | 1999-09-14 | Vlsi Technology, Inc. | Stack cache for stack-based processor and method thereof |
WO2000002118A1 (en) * | 1998-07-02 | 2000-01-13 | Hitachi, Ltd. | Microprocessor |
Non-Patent Citations (1)
Title |
---|
LORCH J R ET AL: "SOFTWARE STRATEGIES FOR PORTABLE COMPUTER ENERGY MANAGEMENT", IEEE PERSONAL COMMUNICATIONS, IEEE COMMUNICATIONS SOCIETY, US, vol. 5, no. 3, 1 June 1998 (1998-06-01), pages 60 - 73, XP000765376, ISSN: 1070-9916 * |
Also Published As
Publication number | Publication date |
---|---|
JP2004507814A (en) | 2004-03-11 |
CN1478224A (en) | 2004-02-25 |
EP1368729A2 (en) | 2003-12-10 |
WO2002017064A2 (en) | 2002-02-28 |
US6766460B1 (en) | 2004-07-20 |
CN100437433C (en) | 2008-11-26 |
EP1368729B1 (en) | 2011-10-12 |
ATE528708T1 (en) | 2011-10-15 |
KR20020085883A (en) | 2002-11-16 |
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