WO2012173822A3 - Aliasing buffers - Google Patents

Aliasing buffers Download PDF

Info

Publication number
WO2012173822A3
WO2012173822A3 PCT/US2012/040946 US2012040946W WO2012173822A3 WO 2012173822 A3 WO2012173822 A3 WO 2012173822A3 US 2012040946 W US2012040946 W US 2012040946W WO 2012173822 A3 WO2012173822 A3 WO 2012173822A3
Authority
WO
WIPO (PCT)
Prior art keywords
buffers
aliasing
runtime
target executable
buffer accesses
Prior art date
Application number
PCT/US2012/040946
Other languages
French (fr)
Other versions
WO2012173822A2 (en
Inventor
Amit Kumar Agarwal
Weirong Zhu
Yosseff Levanoni
Original Assignee
Microsoft Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Microsoft Corporation filed Critical Microsoft Corporation
Priority to EP12800832.3A priority Critical patent/EP2721484A4/en
Priority to CN201280029279.5A priority patent/CN103620554B/en
Publication of WO2012173822A2 publication Critical patent/WO2012173822A2/en
Publication of WO2012173822A3 publication Critical patent/WO2012173822A3/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/40Transformation of program code
    • G06F8/51Source to source
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/445Program loading or initiating
    • G06F9/44536Selecting among different versions

Abstract

The present invention extends to methods, systems, and computer program products for aliasing buffers. Embodiment of the inventions supporting buffer aliasing through introduction of a level of indirection between a source program's buffer accesses and the target executable physical buffers, and binding the logical buffer accesses to actual physical buffer accesses at runtime. A variety of techniques for can be used supporting runtime aliasing of buffers, in a system which otherwise disallows such runtime aliasing between separately defined buffers in the target executable code. Binding of logical buffer accesses in the source program to the actual physical buffers defined in the target executable code is delayed until runtime.
PCT/US2012/040946 2011-06-14 2012-06-05 Aliasing buffers WO2012173822A2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP12800832.3A EP2721484A4 (en) 2011-06-14 2012-06-05 Aliasing buffers
CN201280029279.5A CN103620554B (en) 2011-06-14 2012-06-05 Aliasing relief area

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/160,373 US8990515B2 (en) 2011-06-14 2011-06-14 Aliasing buffers
US13/160,373 2011-06-14

Publications (2)

Publication Number Publication Date
WO2012173822A2 WO2012173822A2 (en) 2012-12-20
WO2012173822A3 true WO2012173822A3 (en) 2013-05-10

Family

ID=47354810

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2012/040946 WO2012173822A2 (en) 2011-06-14 2012-06-05 Aliasing buffers

Country Status (4)

Country Link
US (1) US8990515B2 (en)
EP (1) EP2721484A4 (en)
CN (1) CN103620554B (en)
WO (1) WO2012173822A2 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8468507B2 (en) 2011-06-10 2013-06-18 Microsoft Corporation Binding executable code at runtime
US9952843B2 (en) * 2014-05-15 2018-04-24 Nvidia Corporation Partial program specialization at runtime
US10049052B2 (en) * 2014-10-27 2018-08-14 Nxp Usa, Inc. Device having a cache memory
US10210088B2 (en) 2015-12-28 2019-02-19 Nxp Usa, Inc. Computing system with a cache invalidation unit, a cache invalidation unit and a method of operating a cache invalidation unit in a computing system

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Publication number Priority date Publication date Assignee Title
US20060230223A1 (en) * 2005-04-07 2006-10-12 Ati Technologies, Inc. Method and apparatus for fragment processing in a virtual memory system
US20070288721A1 (en) * 2005-04-07 2007-12-13 Advanced Micro Devices, Inc. Miss-under-miss processing and cache flushing
US20080276261A1 (en) * 2007-05-03 2008-11-06 Aaftab Munshi Data parallel computing on multiple processors
US20100026692A1 (en) * 2008-08-04 2010-02-04 Nvidia Corporation Hybrid graphic display

Non-Patent Citations (1)

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Title
See also references of EP2721484A4 *

Also Published As

Publication number Publication date
EP2721484A4 (en) 2015-03-11
WO2012173822A2 (en) 2012-12-20
US8990515B2 (en) 2015-03-24
CN103620554B (en) 2016-09-28
US20120324430A1 (en) 2012-12-20
CN103620554A (en) 2014-03-05
EP2721484A2 (en) 2014-04-23

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