WO2013189413A3 - 一种缓存处理方法及装置 - Google Patents

一种缓存处理方法及装置 Download PDF

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Publication number
WO2013189413A3
WO2013189413A3 PCT/CN2013/082050 CN2013082050W WO2013189413A3 WO 2013189413 A3 WO2013189413 A3 WO 2013189413A3 CN 2013082050 W CN2013082050 W CN 2013082050W WO 2013189413 A3 WO2013189413 A3 WO 2013189413A3
Authority
WO
WIPO (PCT)
Prior art keywords
data
buffer space
start address
current storage
space
Prior art date
Application number
PCT/CN2013/082050
Other languages
English (en)
French (fr)
Other versions
WO2013189413A2 (zh
Inventor
张林生
Original Assignee
中兴通讯股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 中兴通讯股份有限公司 filed Critical 中兴通讯股份有限公司
Priority to EP13806128.8A priority Critical patent/EP2911061B1/en
Priority to US14/442,066 priority patent/US9563584B2/en
Priority to JP2015543258A priority patent/JP6059360B2/ja
Publication of WO2013189413A2 publication Critical patent/WO2013189413A2/zh
Publication of WO2013189413A3 publication Critical patent/WO2013189413A3/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1673—Details of memory controller using buffers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/468—Specific access rights for resources, e.g. using capability register
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/06—Address interface arrangements, e.g. address buffers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1041—Resource optimization
    • G06F2212/1044—Space efficiency improvement

Abstract

本发明提供一种缓存处理方法及装置。方法包括：在需要缓存第一用户的第一数据时，读取当前存储起始地址；从当前存储起始地址开始存储第一数据到缓存空间，所述第一数据占用的缓存空间为第一缓存空间；对应于所述第一数据，保存包括所述第一缓存空间的起始地址和空间长度的存储位置信息，使在需要读取第一数据时，根据起始地址和空间长度定位所述第一缓存空间，并从第一缓存空间读取第一数据；更新当前存储起始地址为第一缓存空间的下一地址，使下一个需要缓存的数据，从更新后的当前存储起始地址开始进行缓存。本发明更好地利用缓存空间，减少为读取而保存的地址信息。
PCT/CN2013/082050 2012-11-22 2013-08-22 一种缓存处理方法及装置 WO2013189413A2 (zh)

Priority Applications (3)

Application Number Priority Date Filing Date Title
EP13806128.8A EP2911061B1 (en) 2012-11-22 2013-08-22 Buffer processing method and device
US14/442,066 US9563584B2 (en) 2012-11-22 2013-08-22 Method and device for buffer processing in system on chip
JP2015543258A JP6059360B2 (ja) 2012-11-22 2013-08-22 バッファ処理方法及び装置

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201210478383.4A CN103838679B (zh) 2012-11-22 2012-11-22 一种缓存处理方法及装置
CN201210478383.4 2012-11-22

Publications (2)

Publication Number Publication Date
WO2013189413A2 WO2013189413A2 (zh) 2013-12-27
WO2013189413A3 true WO2013189413A3 (zh) 2014-02-13

Family

ID=49769556

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2013/082050 WO2013189413A2 (zh) 2012-11-22 2013-08-22 一种缓存处理方法及装置

Country Status (5)

Country Link
US (1) US9563584B2 (zh)
EP (1) EP2911061B1 (zh)
JP (1) JP6059360B2 (zh)
CN (1) CN103838679B (zh)
WO (1) WO2013189413A2 (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105550124A (zh) * 2015-12-09 2016-05-04 四川长虹电器股份有限公司 一种信息处理方法和电子设备
CN111767234A (zh) * 2020-06-28 2020-10-13 歌尔科技有限公司 数据存储方法、装置、电子产品以及计算机可读存储介质

Citations (4)

* Cited by examiner, † Cited by third party
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US20030196044A1 (en) * 2002-04-12 2003-10-16 Alejandro Ramirez Cache-line reuse-buffer
CN1677946A (zh) * 2004-04-02 2005-10-05 华为技术有限公司 一种缓存分配方法及装置
CN1725728A (zh) * 2004-07-22 2006-01-25 华为技术有限公司 一种基于信令协议的缓冲区的管理方法
CN101122886A (zh) * 2007-09-03 2008-02-13 杭州华三通信技术有限公司 分配缓存空间的方法和装置以及缓存控制器

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DE3781406T2 (de) 1987-06-09 1993-04-01 Ibm Steuerungsschema fuer segmentierte puffer, gegruendet auf gemeinsam genutzter referenzzaehlung.
CA2098459A1 (en) * 1992-06-15 1993-12-16 James L. Adcock Computer method and system for conservative-stack and generational heap garbage collection
JPH06161864A (ja) * 1992-11-19 1994-06-10 Toshiba Corp オブジェクト記憶管理方法
JP3251414B2 (ja) * 1994-01-11 2002-01-28 三菱電機株式会社 プログラマブルコントローラおよびそのプログラム容量変更方法
JPH08241186A (ja) * 1995-03-07 1996-09-17 Fujitsu Ltd バッファメモリ管理ユニット及びバッファメモリ管理方法
US6970893B2 (en) * 2000-10-27 2005-11-29 Bea Systems, Inc. System and method for regeneration of methods and garbage collection of unused methods
TWI244087B (en) * 2004-08-12 2005-11-21 Via Tech Inc Method and device for memory space allocation
JP2006161864A (ja) 2004-12-02 2006-06-22 Calsonic Kansei Corp 自動変速機のセレクトアシスト装置
JP5073337B2 (ja) 2007-03-28 2012-11-14 株式会社ダイセル 点火器組立体
CN101196857B (zh) * 2008-01-04 2010-11-10 太原理工大学 双端口访问对称动态存储器的接口
EP2350834A1 (en) * 2008-10-28 2011-08-03 Nxp B.V. Data processing circuit with cache and interface for a detachable device
CN102646084A (zh) * 2012-03-06 2012-08-22 上海纳轩电子科技有限公司 一种基于fpga实现的高效网络数据包存储方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030196044A1 (en) * 2002-04-12 2003-10-16 Alejandro Ramirez Cache-line reuse-buffer
CN1677946A (zh) * 2004-04-02 2005-10-05 华为技术有限公司 一种缓存分配方法及装置
CN1725728A (zh) * 2004-07-22 2006-01-25 华为技术有限公司 一种基于信令协议的缓冲区的管理方法
CN101122886A (zh) * 2007-09-03 2008-02-13 杭州华三通信技术有限公司 分配缓存空间的方法和装置以及缓存控制器

Also Published As

Publication number Publication date
JP6059360B2 (ja) 2017-01-11
US9563584B2 (en) 2017-02-07
CN103838679A (zh) 2014-06-04
EP2911061B1 (en) 2022-03-30
JP2016504665A (ja) 2016-02-12
CN103838679B (zh) 2017-08-04
US20150317264A1 (en) 2015-11-05
WO2013189413A2 (zh) 2013-12-27
EP2911061A4 (en) 2015-11-11
EP2911061A2 (en) 2015-08-26

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